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https://github.com/YosysHQ/yosys
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14 lines
1.1 KiB
Text
14 lines
1.1 KiB
Text
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sync_cell.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sync_reset.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_register_file.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_dbg_uart.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_alu.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_watchdog.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sfr.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_multiplier.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_mem_backbone.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_frontend.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_execution_unit.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_dbg.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_clock_module.v"
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verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/openMSP430.v"
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