Ben Widawsky 8767ec3fbd Add a few more filename rewrites ... This now allows a full pipeline to work, something such as: yosys -p "synth_ecp5 -json ~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v" Otherwise, you will get something along the lines of: ERROR: Can't open output file `~/work/fpga/prjtrellis/examples/ecp5_evn/blinky.v' for writing: No such file or directory Signed-off-by: Ben Widawsky <ben@bwidawsk.net>		2019-06-20 10:27:59 -07:00
..
bitpattern.h
calc.cc
cellaigs.cc	Fixes for OAI4 cell implementation	2019-04-23 17:54:00 +01:00
cellaigs.h
celledges.cc
celledges.h
celltypes.h	Add $specrule cells for $setup/$hold/$skew specify rules	2019-04-23 21:36:59 +02:00
consteval.h
cost.h
driver.cc	fix codestyle formatting	2019-04-29 19:20:33 +09:00
hashlib.h
log.cc	Fixes and cleanups in AST_TECALL handling	2019-06-07 12:41:09 +02:00
log.h	Initial implementation of elaboration system tasks	2019-05-03 03:10:43 +03:00
macc.h
modtools.h
register.cc	Add a few more filename rewrites	2019-06-20 10:27:59 -07:00
register.h
rtlil.cc	In RTLIL::Module::check(), check process invariants.	2019-06-19 05:22:13 +00:00
rtlil.h	Refactor hierarchy wand/wor handling	2019-05-28 16:43:25 +02:00
satgen.h
sigtools.h
utils.h
yosys.cc	Support ~ for home directory	2019-06-18 14:38:40 -07:00
yosys.h	Optimize ceil_log2 function	2019-05-07 12:17:56 -05:00