|
add_sub.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |
|
adffs.ys
|
Replace opt_rmdff with opt_dff.
|
2020-08-07 13:21:03 +02:00 |
|
blockram.ys
|
intel_alm: direct M10K instantiation
|
2020-07-27 15:39:06 +02:00 |
|
counter.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |
|
dffs.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |
|
fsm.ys
|
Replace opt_rmdff with opt_dff.
|
2020-08-07 13:21:03 +02:00 |
|
logic.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |
|
lutram.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |
|
mul.ys
|
intel_alm: Add multiply signedness to cells
|
2020-08-26 22:50:16 +02:00 |
|
quartus_ice.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |
|
shifter.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |
|
tribuf.ys
|
intel_alm: add Cyclone 10 GX tests
|
2020-07-05 21:36:38 +02:00 |