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yosys/kernel
Jannis Harder 62b4df4989 dft_tag: Implement $overwrite_tag and $original_tag
This does not correctly handle an `$overwrite_tag` on a module output,
but since we currently require the user to flatten the design for
cross-module dft, this cannot be observed from within the design, only
by manually inspecting the signals in the design.
2023-09-13 11:32:36 +02:00
..
binding.cc
binding.h
bitpattern.h
calc.cc
cellaigs.cc
cellaigs.h
celledges.cc
celledges.h
celltypes.h
consteval.h
constids.inc
cost.h
driver.cc
ff.cc
ff.h
ffinit.h
ffmerge.cc
ffmerge.h
fmt.cc
fmt.h
fstdata.cc
fstdata.h
hashlib.h
json.cc
json.h
log.cc
log.h
macc.h
mem.cc
mem.h
modtools.h
qcsat.cc
qcsat.h
register.cc
register.h
rtlil.cc dft_tag: Implement $overwrite_tag and $original_tag 2023-09-13 11:32:36 +02:00
rtlil.h dft_tag: Implement $overwrite_tag and $original_tag 2023-09-13 11:32:36 +02:00
satgen.cc
satgen.h
sigtools.h
timinginfo.h
utils.h
yosys.cc
yosys.h
yw.cc
yw.h