Dan Ravensloft 5b779f7f4e intel_alm: direct LUTRAM cell instantiation ... By instantiating the LUTRAM cell directly, we avoid a trip through altsyncram, which speeds up Quartus synthesis time. This also gives a little more flexibility, as Yosys can build RAMs out of individual 32x1 LUTRAM cells. While working on this, I discovered that the mem_init0 parameter of <family>_mlab_cell gets ignored by Quartus.		2020-05-07 21:03:13 +02:00
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lutram.ys	intel_alm: direct LUTRAM cell instantiation	2020-05-07 21:03:13 +02:00
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quartus_ice.ys	intel_alm: work around a Quartus ICE	2020-04-23 11:03:28 +02:00
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