3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-07 09:55:20 +00:00
yosys/passes
David Shah c43e52d2d7 Add equiv_opt -multiclock
Signed-off-by: David Shah <dave@ds0.me>
2019-09-11 13:55:59 +01:00
..
cmds Fix select command error msg, fixes issue #1081 2019-09-01 11:00:09 +02:00
equiv Add equiv_opt -multiclock 2019-09-11 13:55:59 +01:00
fsm RTLIL::S{0,1} -> State::S{0,1} 2019-08-07 11:12:38 -07:00
hierarchy Adopt @cliffordwolf's suggestion 2019-09-03 12:18:50 -07:00
memory stoi -> atoi 2019-08-07 11:09:17 -07:00
opt passes: opt_share: don't statically initialize mergeable_type_map 2019-09-09 12:40:01 +08:00
pmgen Fix misspelling 2019-09-09 16:46:33 -07:00
proc proc_clean: fix order of switch insertion. 2019-08-19 16:44:23 +00:00
sat Add $dlatch support to async2sync 2019-08-28 09:45:22 +02:00
techmap techmap: Add support for extracting init values of ports 2019-09-07 16:30:43 +02:00
tests More use of IdString::in() 2019-08-15 09:23:57 -07:00