3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-13 09:26:16 +00:00
yosys/tests
Jannis Harder 3ebc50dee4
Merge pull request #3467 from jix/fix_cellarray_simplify
simplify: Do not recursively simplify AST_CELL within AST_CELLARRAY
2022-12-19 16:05:13 +01:00
..
aiger
arch fabulous: Allow adding extra custom prims and map rules 2022-11-17 13:34:58 +01:00
asicworld
bind
blif Adding check for BLIF names command input plane size. 2022-08-21 23:18:20 -05:00
bram
errors
fsm
hana
liberty
lut
memfile
memlib Add memory_libmap tests. 2022-05-18 17:32:56 +02:00
memories
opt Reenable existing equiv_opt tests 2022-10-07 16:04:51 +02:00
opt_share
proc proc_rom: Add special handling of const-0 address bits. 2022-05-18 17:32:30 +02:00
realmath
rpc
sat
select
share
sim Replace GNU specific invocation of basename(1) with the equivalent 2022-10-23 11:02:18 +13:00
simple verilog: Support module-scoped task/function calls 2022-10-29 15:14:11 -04:00
simple_abc9
smv
sva verific: Use new value change logic also for $stable of wide signals. 2022-05-11 13:05:27 +02:00
svinterfaces
svtypes Support for packed multidimensional arrays within packed structs 2022-12-03 19:54:47 +01:00
techmap Reenable existing equiv_opt tests 2022-10-07 16:04:51 +02:00
tools support file locations containing spaces 2022-08-08 20:30:50 +02:00
unit
various simplify: regression test for AST_CELLARRAY simplification issue 2022-12-07 18:41:55 +01:00
verilog verilog: fix width/sign detection for functions 2022-05-30 16:45:39 -04:00
vloghtb
gen-tests-makefile.sh support file locations containing spaces 2022-08-08 20:30:50 +02:00