Eddie Hung 5b5756b91e Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}		2019-09-30 12:52:43 +02:00
..
tests
.gitignore
abc_map.v
abc_model.v
abc_unmap.v
abc_xc7.box
abc_xc7.lut
abc_xc7_nowide.lut
arith_map.v
brams_init.py
cells_map.v
cells_sim.v	Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}	2019-09-30 12:52:43 +02:00
cells_xtra.py	Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}	2019-09-30 12:52:43 +02:00
dsp_map.v
lut_map.v
lutrams.txt
lutrams_map.v
Makefile.inc
mux_map.v
synth_xilinx.cc
xc6s_brams.txt
xc6s_brams_bb.v
xc6s_brams_map.v
xc6s_cells_xtra.v	Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}	2019-09-30 12:52:43 +02:00
xc6s_ff_map.v	synth_xilinx: Support latches, remove used-up FF init values.	2019-09-30 12:52:43 +02:00
xc6v_cells_xtra.v	Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}	2019-09-30 12:52:43 +02:00
xc7_brams.txt
xc7_brams_bb.v
xc7_brams_map.v
xc7_cells_xtra.v	Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}	2019-09-30 12:52:43 +02:00
xc7_ff_map.v	synth_xilinx: Support latches, remove used-up FF init values.	2019-09-30 12:52:43 +02:00
xcu_cells_xtra.v	Add LDCE/LDPE sim library, remove from *cells_xtra.{v,py}	2019-09-30 12:52:43 +02:00