..
abc9_model.v
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
arith_map.v
analogdevices: update timing model
2025-10-14 14:13:15 +01:00
brams.txt
analogdevices: Fixing up bram
2025-10-18 17:31:54 +13:00
brams_defs.vh
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
brams_map.v
analogdevices: Fixing up bram
2025-10-18 17:31:54 +13:00
cells_map.v
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
cells_sim.v
analogdevices: timings for t40lp
2025-10-14 14:13:15 +01:00
cells_xtra.py
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
cells_xtra.v
analogdevices: remove some extra cells!
2025-10-14 14:13:15 +01:00
dsp_map.v
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
ff_map.v
test suite
2025-10-14 14:13:15 +01:00
lut_map.v
analogdevices: use single tech param
2025-10-14 14:13:15 +01:00
lutrams.txt
analogdevices: Add BRAM options
2025-10-18 12:59:55 +13:00
lutrams_map.v
analogdevices: Add BRAM options
2025-10-18 12:59:55 +13:00
Makefile.inc
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
mux_map.v
Create synth_analogdevices
2025-10-14 14:13:15 +01:00
retarget_map.v
analogdevices: user retargeting
2025-10-14 14:13:15 +01:00
synth_analogdevices.cc
analogdevices: Add BRAM options
2025-10-18 12:59:55 +13:00