mirror of
https://github.com/YosysHQ/yosys
synced 2025-11-04 05:19:11 +00:00
15 lines
304 B
Bash
15 lines
304 B
Bash
#!/bin/bash
|
|
|
|
set -ex
|
|
|
|
# iverlog simulation
|
|
echo "Doing Verilog simulation with iverilog"
|
|
iverilog -o counter_tb counter.v counter_tb.v
|
|
./counter_tb; gtkwave counter_tb.gtkw &
|
|
|
|
# yosys synthesis
|
|
../../yosys counter_digital.ys
|
|
|
|
# requires ngspice with xspice support enabled:
|
|
ngspice testbench_digital.sp
|
|
|