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yosys/techlibs
History
Clifford Wolf c6ca4780e2 iCE40 DFF sim models: init Q regs to 0
2015-07-20 13:05:18 +02:00
..
cmos Improved liberty file test case 2015-07-06 17:45:56 +02:00
common Added "synth -nofsm" 2015-07-02 15:25:38 +02:00
ice40 iCE40 DFF sim models: init Q regs to 0 2015-07-20 13:05:18 +02:00
xilinx Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00