mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-07 09:55:20 +00:00
b9b5899cce
* Copies guidelines files into docs/ for website * Copying manual/CHAPTER_Prog for new docs * Copying manual/APPNOTE_011... for new docs Also adding faketime to list of packages for website build. Co-authored-by: KrystalDelusion <krystinedawn@yosyshq.com>
4 lines
74 B
Verilog
4 lines
74 B
Verilog
module cmos_demo(input a, b, output [1:0] y);
|
|
assign y = a + b;
|
|
endmodule
|