mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-07 18:05:24 +00:00
On Minerva SoC SRAM, depending on the compiler, this change improves overall time by 4-7%. |
||
---|---|---|
.. | ||
cxxrtl.h | ||
cxxrtl_backend.cc | ||
cxxrtl_capi.cc | ||
cxxrtl_capi.h | ||
cxxrtl_vcd.h | ||
cxxrtl_vcd_capi.cc | ||
cxxrtl_vcd_capi.h | ||
Makefile.inc |