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yosys/techlibs
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Clifford Wolf e041ae3c6d
Merge pull request #777 from mmicko/achronix_cell_sim_fix 
Fix cells_sim.v for Achronix FPGA
2019-01-04 15:18:18 +01:00
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achronix Merge pull request #777 from mmicko/achronix_cell_sim_fix 2019-01-04 15:18:18 +01:00
anlogic Merge pull request #755 from Icenowy/anlogic-dram-init 2019-01-02 16:28:18 +01:00
common Merge pull request #772 from whitequark/synth_lut 2019-01-02 15:44:57 +01:00
coolrunner2 Unify usage of noflatten among architectures 2019-01-04 11:37:25 +01:00
easic Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
ecp5 Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
gowin Unify usage of noflatten among architectures 2019-01-04 11:37:25 +01:00
greenpak4 Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
ice40 Merge pull request #772 from whitequark/synth_lut 2019-01-02 15:44:57 +01:00
intel Unify usage of noflatten among architectures 2019-01-04 11:37:25 +01:00
sf2 Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
xilinx Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00