Krystine Sherwin 48f358bb09 Docs: Update example_synth ... We can now fake the `yosys> flatten;;` line, so we no longer need to explain the split flatten/clean.		2024-08-17 11:34:44 +12:00
..
axis	docs: moving code examples	2023-11-14 12:55:39 +13:00
extensions	Docs: Force read_verilog to avoid verific header	2024-04-13 11:33:04 +12:00
fifo	Docs: Update example_synth	2024-08-17 11:34:44 +12:00
intro	Docs: updating makefiles	2024-01-25 12:35:03 +13:00
macc	Docs: updating makefiles	2024-01-25 12:35:03 +13:00
macro_commands	docs: Add synth_ice40 to macro checks	2024-03-18 11:01:09 +13:00
opt	Docs: updating makefiles	2024-01-25 12:35:03 +13:00
scrambler	Docs: updating makefiles	2024-01-25 12:35:03 +13:00
selections	Docs: work on selections.rst	2024-01-26 17:29:59 +13:00
show	docs: Fix splice.v in verific	2024-03-19 05:57:26 +13:00
stubnets	Docs: updating makefiles	2024-01-25 12:35:03 +13:00
synth_flow	Docs: updating makefiles	2024-01-25 12:35:03 +13:00
techmap	Docs: updating makefiles	2024-01-25 12:35:03 +13:00
.gitignore	docs: moving code examples	2023-11-14 12:55:39 +13:00
primetest.v	docs: moving code examples	2023-11-14 12:55:39 +13:00