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b6e61c16b1
see also previous commit Also updates `scripting_intro.rst` to use literal includes, and uses individual image outputs to avoid the intermediary `.tex` file to join them all.
44 lines
1.3 KiB
Plaintext
44 lines
1.3 KiB
Plaintext
read_verilog macc_xilinx_test.v
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read_verilog -lib -icells macc_xilinx_unwrap_map.v
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read_verilog -lib -icells macc_xilinx_xmap.v
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hierarchy -check ;;
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show -prefix macc_xilinx_test1a -format dot -notitle test1
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show -prefix macc_xilinx_test2a -format dot -notitle test2
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techmap -map macc_xilinx_swap_map.v;;
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show -prefix macc_xilinx_test1b -format dot -notitle test1
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show -prefix macc_xilinx_test2b -format dot -notitle test2
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techmap -map macc_xilinx_wrap_map.v
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connwrappers -unsigned $__mul_wrapper Y Y_WIDTH \
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-unsigned $__add_wrapper Y Y_WIDTH;;
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show -prefix macc_xilinx_test1c -format dot -notitle test1
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show -prefix macc_xilinx_test2c -format dot -notitle test2
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design -push
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read_verilog macc_xilinx_xmap.v
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techmap -map macc_xilinx_swap_map.v
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techmap -map macc_xilinx_wrap_map.v;;
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design -save __macc_xilinx_xmap
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design -pop
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extract -constports -ignore_parameters \
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-map %__macc_xilinx_xmap \
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-swap $__add_wrapper A,B ;;
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show -prefix macc_xilinx_test1d -format dot -notitle test1
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show -prefix macc_xilinx_test2d -format dot -notitle test2
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techmap -map macc_xilinx_unwrap_map.v;;
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show -prefix macc_xilinx_test1e -format dot -notitle test1
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show -prefix macc_xilinx_test2e -format dot -notitle test2
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design -load __macc_xilinx_xmap
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show -prefix macc_xilinx_xmap -format dot -notitle
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