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Code Activity
yosys/passes
History
Clifford Wolf b64b38eea2 Renamed $lut ports to follow A-Y naming scheme
2014-08-15 14:18:40 +02:00
..
abc Renamed $lut ports to follow A-Y naming scheme 2014-08-15 14:18:40 +02:00
cmds RIP $safe_pmux 2014-08-14 11:39:46 +02:00
fsm More idstring sort_by_* helpers and fixed tpl ordering in techmap 2014-08-15 02:40:46 +02:00
hierarchy Added module->ports 2014-08-14 16:22:52 +02:00
memory Various improvements in memory_dff pass 2014-08-06 14:31:38 +02:00
opt Renamed $_INV_ cell type to $_NOT_ 2014-08-15 14:11:40 +02:00
proc Fixed handling of constant-true branches in proc_clean 2014-08-12 17:35:22 +02:00
sat Renamed $_INV_ cell type to $_NOT_ 2014-08-15 14:11:40 +02:00
techmap Renamed $_INV_ cell type to $_NOT_ 2014-08-15 14:11:40 +02:00
tests RIP $safe_pmux 2014-08-14 11:39:46 +02:00