Krystine Sherwin 97354782c0 Adding double_sync_ram_tdp to blockram.v		2023-12-04 15:52:03 +01:00
..
memory_attributes
add_sub.v
adffs.v	Allow initial blocks to be disabled during tests	2021-11-13 21:53:25 +01:00
blockram.v	Adding double_sync_ram_tdp to blockram.v	2023-12-04 15:52:03 +01:00
blockrom.v	ecp5: add support for both 1364.1 and LSE RAM/ROM attributes.	2020-02-06 16:52:51 +00:00
counter.v	Fix files with CRLF line endings	2021-06-09 12:16:33 +02:00
dffs.v	Allow initial blocks to be disabled during tests	2021-11-13 21:53:25 +01:00
fsm.v	Fix files with CRLF line endings	2021-06-09 12:16:33 +02:00
latches.v
logic.v
lutram.v
mul.v	intel_alm: Add multiply signedness to cells	2020-08-26 22:50:16 +02:00
mux.v
shifter.v	Allow initial blocks to be disabled during tests	2021-11-13 21:53:25 +01:00
tribuf.v