This website requires JavaScript.
Explore
Help
Register
Sign In
mirrors
/
yosys
Watch
3
Star
0
Fork
You've already forked yosys
0
mirror of
https://github.com/YosysHQ/yosys
synced
2025-04-11 03:33:36 +00:00
Code
Activity
b3e2538a14
yosys
/
techlibs
/
intel_alm
History
Eddie Hung
8fbb55f4ab
synth_*: no need to explicitly read +/abc9_model.v
2020-05-14 10:33:56 -07:00
..
common
intel_alm: direct LUTRAM cell instantiation
2020-05-07 21:03:13 +02:00
Makefile.inc
intel_alm: direct LUTRAM cell instantiation
2020-05-07 21:03:13 +02:00
synth_intel_alm.cc
synth_*: no need to explicitly read +/abc9_model.v
2020-05-14 10:33:56 -07:00