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yosys/passes
2026-07-17 23:33:02 +02:00
..
cmds signorm: disable passes that use rewrite_sigspecs 2026-07-17 23:33:02 +02:00
equiv signorm: disable passes that use rewrite_sigspecs 2026-07-17 23:33:02 +02:00
fsm Migrate build system to CMake 2026-06-03 08:58:10 +00:00
hierarchy flatten: skip $input_port cells in template module 2026-07-17 23:32:34 +02:00
memory Remove trailing whitespaces 2026-06-23 07:24:59 +02:00
opt signorm: disable in passes that use swap_names 2026-07-17 23:32:34 +02:00
pmgen Migrate build system to CMake 2026-06-03 08:58:10 +00:00
proc Merge branch 'main' into nella/latch-toggle 2026-07-08 11:41:08 +02:00
sat signorm: disable passes that use rewrite_sigspecs 2026-07-17 23:33:02 +02:00
techmap signorm: disable passes that use rewrite_sigspecs 2026-07-17 23:33:02 +02:00
tests End of file fix 2026-06-23 07:23:41 +02:00
CMakeLists.txt Migrate build system to CMake 2026-06-03 08:58:10 +00:00