mirror of
https://github.com/YosysHQ/yosys
synced 2025-04-24 09:35:32 +00:00
b74d33d1b8
The behavior of these format specifiers is highly specific to Verilog (`$time` and `$realtime` are only defined relative to `$timescale`) and may not fit other languages well, if at all. If they choose to use it, it is now clear what they are opting into. This commit also simplifies the CXXRTL code generation for these format specifiers. |
||
|---|---|---|
| .. | ||
| fuzz | ||
| .gitignore | ||
| always_comb.v | ||
| always_comb_tb.cc | ||
| always_comb_tb.v | ||
| always_display.v | ||
| always_full.v | ||
| always_full_tb.cc | ||
| always_full_tb.v | ||
| display_lm.v | ||
| display_lm_tb.cc | ||
| initial_display.v | ||
| roundtrip.v | ||
| roundtrip_tb.v | ||
| run-test.sh | ||