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18 lines
818 B
Text
18 lines
818 B
Text
bram $__FLEX_TDPRAM_256x36 # Name of the BRAM cell
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init 0 # Set to '1' if BRAM can be initialized
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abits 8 # Number of address bits
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dbits 36 # Number of data bits
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groups 2 # Number of port groups
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ports 1 1 # Number of ports in each group
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wrmode 0 1 # Set to '1' if this group is write ports
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enable 1 1 # Number of enable bits
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transp 0 0 # transparent (read ports)
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clocks 2 3 # clock configuration
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clkpol 1 1 # clock polarity configuration
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endbram
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match $__FLEX_TDPRAM_256x36
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min efficiency 0 # Only use this bram is <=0 ram bits are used
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make_transp # Add external circuitry to simulate 'transparent read' if necessary
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endmatch
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