Marcin Kościelnicki 89adef352f xilinx: Add support for LUT RAM on LUT4-based devices. ... There are multiple other kinds of RAMs supported on these devices, but RAM16X1D is the only dual-port one. Fixes #1549		2020-02-07 09:03:22 +01:00
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aiger	Add testcases	2020-01-07 11:44:20 -08:00
arch	xilinx: Add support for LUT RAM on LUT4-based devices.	2020-02-07 09:03:22 +01:00
asicworld
bram
errors
fsm
hana
liberty
lut
memories
opt	Merge pull request #1576 from YosysHQ/eddie/opt_merge_init	2020-02-05 14:56:26 -08:00
opt_share
proc
realmath
rpc
sat	Merge pull request #1638 from YosysHQ/eddie/fix1631	2020-02-05 19:31:18 +01:00
share
simple	Make SV2017 compliant courtesy of @wsnyder	2019-12-12 07:34:07 -08:00
simple_abc9	simple_abc9 tests to discard whitebox before write for sim	2020-01-23 22:07:43 -08:00
smv
sva
svinterfaces
svtypes
techmap	shiftx2mux: fix select out of bounds	2020-02-05 16:41:09 -08:00
tools
unit	Build hotfix in tests/unit/Makefile	2016-12-11 10:58:49 +01:00
various	sv: More tests for wildcard port connections	2020-02-02 16:12:33 +00:00
vloghtb