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Code Activity
yosys/tests/arch/xilinx
History
Marcin Kościelnicki aff6ad1ce0 xilinx: Improve flip-flop handling. 
This adds support for infering more kinds of flip-flops:

- FFs with async set/reset and clock enable
- FFs with sync set/reset
- FFs with sync set/reset and clock enable

Some passes have been moved (and some added) in order for dff2dffs to
work correctly.

This gives us complete coverage of Virtex 6+ and Spartan 6 flip-flop
capabilities (though not latch capabilities).  Older FPGAs also support
having both a set and a reset input, which will be handled at a later
data.
2019-12-18 13:43:43 +01:00
..
.gitignore Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
add_sub.ys Share common tests 2019-10-18 12:19:59 +02:00
adffs.ys xilinx: Improve flip-flop handling. 2019-12-18 13:43:43 +01:00
attributes_test.ys Fixing compiler warning/issues. Moving test script to the correct place 2019-12-16 10:23:45 -06:00
blockram.ys Add another test 2019-12-16 13:57:55 -08:00
bug1460.ys Add #1460 testcase 2019-12-12 17:49:55 -08:00
counter.ys xilinx: Use INV instead of LUT1 when applicable 2019-11-25 20:40:39 +01:00
dffs.ys Share common tests 2019-10-18 12:19:59 +02:00
dsp_fastfir.ys No need for -abc9 2019-11-26 23:08:14 -08:00
dsp_simd.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
fsm.ys xilinx: Improve flip-flop handling. 2019-12-18 13:43:43 +01:00
latches.ys xilinx: Use INV instead of LUT1 when applicable 2019-11-25 20:40:39 +01:00
logic.ys xilinx: Use INV instead of LUT1 when applicable 2019-11-25 20:40:39 +01:00
lutram.ys Disable RAM16X1D test 2019-12-13 10:28:13 -08:00
macc.sh tests: arch: xilinx: Change order of arguments in macc.sh 2019-12-06 09:15:49 +01:00
macc.v Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
macc.ys xilinx: Improve flip-flop handling. 2019-12-18 13:43:43 +01:00
macc_tb.v Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
mul.ys Share common tests 2019-10-18 12:19:59 +02:00
mul_unsigned.v Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
mul_unsigned.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
mux.ys Share common tests 2019-10-18 12:19:59 +02:00
pmgen_xilinx_srl.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
run-test.sh Fix path to yosys 2019-10-18 11:12:03 +02:00
shifter.ys Share common tests 2019-10-18 12:19:59 +02:00
tribuf.ys Share common tests 2019-10-18 12:19:59 +02:00
xilinx_srl.v Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00
xilinx_srl.ys Moved all tests in arch sub directory 2019-10-18 11:06:12 +02:00