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yosys/frontends
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Eddie Hung 7a62ee57b4
Merge pull request #2024 from YosysHQ/eddie/primitive_src 
verilog: set src attribute for primitives
2020-05-05 06:49:18 -07:00
..
aiger aiger: fixes for ports that have start_offset != 0 2020-05-02 10:00:32 -07:00
ast verilog: set src attribute for primitives 2020-05-04 10:22:05 -07:00
blif
ilang ilang, ast: Store parameter order and default value information. 2020-04-21 19:09:00 +02:00
json
liberty
rpc Add WASI platform support. 2020-04-30 18:56:25 +00:00
verific verific: ignore anonymous enums 2020-04-30 07:48:47 -07:00
verilog Merge pull request #2024 from YosysHQ/eddie/primitive_src 2020-05-05 06:49:18 -07:00