mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-05-17 20:54:47 +00:00
Code Activity
yosys/backends/verilog
History
Miodrag Milanovic addc493e8d generate only simple assignments in verilog backend
2020-11-25 17:43:28 +01:00
..
Makefile.inc initial import 2013-01-05 11:13:26 +01:00
verilog_backend.cc generate only simple assignments in verilog backend 2020-11-25 17:43:28 +01:00