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yosys/tests/arch/ice40/tribuf.v
2019-10-18 11:06:12 +02:00

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module tristate (en, i, o);
input en;
input i;
output o;
assign o = en ? i : 1'bz;
endmodule
module top (
input en,
input a,
output b
);
tristate u_tri (
.en (en ),
.i (a ),
.o (b )
);
endmodule