Clifford Wolf 8ff229a3ea Fixed WE/RE usage in iCE40 BRAM mapping		2015-11-24 10:51:34 +01:00
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common	Progress on cell help messages	2015-10-20 16:49:11 +02:00
greenpak4
ice40	Fixed WE/RE usage in iCE40 BRAM mapping	2015-11-24 10:51:34 +01:00
xilinx	Bugfix in Xilinx LUT mapping	2015-10-30 13:58:03 +01:00
.gitignore