Jannis Harder c77b7343d0 Consistent $mux undef handling ... * Change simlib's $mux cell to use the ternary operator as $_MUX_ already does * Stop opt_expr -keepdc from changing S=x to S=0 * Change const eval of $mux and $pmux to match the updated simlib (fixes sim) * The sat behavior of $mux already matches the updated simlib The verilog frontend uses $mux for the ternary operators and this changes all interpreations of the $mux cell (that I found) to match the verilog simulation behavior for the ternary operator. For 'if' and 'case' expressions the frontend may also use $mux but uses $eqx if the verilog simulation behavior is requested with the '-ifx' option. For $pmux there is a remaining mismatch between the sat behavior and the simlib behavior. Resolving this requires more discussion, as the $pmux cell does not directly correspond to a specific verilog construct.		2022-10-24 12:03:01 +02:00
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binding.cc
binding.h
bitpattern.h
calc.cc
cellaigs.cc
cellaigs.h
celledges.cc
celledges.h
celltypes.h
consteval.h
constids.inc
cost.h
driver.cc
ff.cc
ff.h
ffinit.h
ffmerge.cc
ffmerge.h
fstdata.cc
fstdata.h
hashlib.h
log.cc
log.h
macc.h
mem.cc
mem.h
modtools.h
qcsat.cc
qcsat.h
register.cc
register.h
rtlil.cc
rtlil.h
satgen.cc
satgen.h
sigtools.h
timinginfo.h
utils.h
yosys.cc
yosys.h