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a96c775a73
yosys
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techlibs
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xilinx
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Clifford Wolf
8a69759306
Add techlibs/xilinx/lut2lut.v
2017-07-10 12:09:05 +02:00
..
tests
.gitignore
arith_map.v
brams.txt
brams_bb.v
brams_init.py
brams_map.v
cells_map.v
cells_sim.v
cells_xtra.sh
cells_xtra.v
drams.txt
drams_bb.v
drams_map.v
lut2lut.v
Makefile.inc
synth_xilinx.cc