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yosys/frontends
Eddie Hung 5084fa9d8a Revert "verilog: specify polarity to be separate token"
This reverts commit 2122e0d053de659d5264500dc18965ba10013590.
2020-05-05 07:51:22 -07:00
..
aiger aiger: fixes for ports that have start_offset != 0 2020-05-02 10:00:32 -07:00
ast verilog: set src attribute for primitives 2020-05-04 10:22:05 -07:00
blif kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
ilang ilang, ast: Store parameter order and default value information. 2020-04-21 19:09:00 +02:00
json Update JSON front-end to process new attr/param encoding 2019-08-01 12:48:22 +02:00
liberty kernel: big fat patch to use more ID::*, otherwise ID(*) 2020-04-02 09:51:32 -07:00
rpc Add WASI platform support. 2020-04-30 18:56:25 +00:00
verific verific: ignore anonymous enums 2020-04-30 07:48:47 -07:00
verilog Revert "verilog: specify polarity to be separate token" 2020-05-05 07:51:22 -07:00