3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-07 09:55:20 +00:00
yosys/tests/liberty/issue3498_bad.lib.verilogsim.ok
2024-08-13 18:47:36 +02:00

3 lines
28 B
Plaintext

module bugbad ();
endmodule