3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-07 01:54:10 +00:00
yosys/tests/various/pmux2shiftx.ys
Clifford Wolf a80e74dc20 Updaye pmux2shiftx test
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2019-04-22 16:17:43 +02:00

29 lines
467 B
Plaintext

read_verilog pmux2shiftx.v
prep
design -save gold
pmux2shiftx -min_density 70
opt
stat
# show -width
select -assert-count 1 t:$sub
select -assert-count 1 t:$mux
select -assert-count 1 t:$shift
select -assert-count 3 t:$shiftx
design -stash gate
design -import gold -as gold
design -import gate -as gate
miter -equiv -flatten -make_assert -make_outputs gold gate miter
sat -verify -prove-asserts -show-ports miter
design -load gold
stat
design -load gate
stat