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			16 lines
		
	
	
	
		
			504 B
		
	
	
	
		
			Text
		
	
	
	
	
	
			
		
		
	
	
			16 lines
		
	
	
	
		
			504 B
		
	
	
	
		
			Text
		
	
	
	
	
	
| read_verilog <<EOT
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| module top(input a, b, output [5:0] y);
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| and (y[0], a, b);
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| nand (y[1], a, b);
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| or (y[2], a, b);
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| nor (y[3], a, b);
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| xor (y[4], a, b);
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| xnor (y[5], a, b);
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| endmodule
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| EOT
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| select -assert-count 1 t:$and a:src=<<EOT:2.4-2.17 %i
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| select -assert-count 1 t:$and a:src=<<EOT:3.5-3.18 %i
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| select -assert-count 1 t:$or a:src=<<EOT:4.3-4.16 %i
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| select -assert-count 1 t:$or a:src=<<EOT:5.4-5.17 %i
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| select -assert-count 1 t:$xor a:src=<<EOT:6.4-6.17 %i
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| select -assert-count 1 t:$xor a:src=<<EOT:7.5-7.18 %i
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