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yosys/techlibs/fabulous/io_map.v
Miodrag Milanovic 48a3dcc02a End of file fix
2026-06-23 07:23:41 +02:00

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Verilog

module \$__FABULOUS_IBUF (input PAD, output O);
IO_1_bidirectional_frame_config_pass _TECHMAP_REPLACE_ (.PAD(PAD), .O(O), .T(1'b1));
endmodule
module \$__FABULOUS_OBUF (output PAD, input I);
IO_1_bidirectional_frame_config_pass _TECHMAP_REPLACE_ (.PAD(PAD), .I(I), .T(1'b0));
endmodule