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yosys/techlibs
David Shah 80884d6f7b ice40: Fix test_dsp_model.sh
Signed-off-by: David Shah <dave@ds0.me>
2019-07-19 17:33:57 +01:00
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achronix Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
anlogic Reduce amount of trailing whitespace in code base 2019-02-28 14:58:11 -08:00
common gen_lut to return correctly sized LUT mask 2019-07-16 12:45:29 -07:00
coolrunner2 Unify usage of noflatten among architectures 2019-01-04 11:37:25 +01:00
easic Fix typographical and grammatical errors and inconsistencies. 2019-01-02 13:12:17 +00:00
ecp5 synth_ecp5: rename dram to lutram everywhere. 2019-07-16 20:45:12 +00:00
gowin Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-master 2019-04-22 09:09:27 +02:00
greenpak4 techlibs/greenpak4/cells_map.v: Harmonize whitespace within lut module 2019-02-26 09:40:46 -08:00
ice40 ice40: Fix test_dsp_model.sh 2019-07-19 17:33:57 +01:00
intel Merge pull request #1208 from ZirconiumX/intel_cleanups 2019-07-18 19:04:28 +01:00
sf2 Add link to SF2 / igloo2 macro library guide 2019-03-07 09:08:26 -08:00
xilinx Merge pull request #1182 from koriakin/xc6s-bram 2019-07-11 12:55:35 -07:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00