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yosys/techlibs/greenpak4
2026-05-08 20:59:24 -07:00
..
cells_blackbox.v
cells_latch.v
cells_map.v Add force_downto and force_upto wire attributes. 2020-05-19 01:42:40 +02:00
cells_sim.v
cells_sim_ams.v
cells_sim_digital.v Change to use blocking assignments in non-clocked processes. 2025-04-23 17:21:32 +02:00
cells_sim_wip.v
gp_dff.lib
greenpak4_dffinv.cc Refactored uses of log_id() 2026-05-08 20:59:24 -07:00
Makefile.inc
synth_greenpak4.cc Add check before flatten in synth_*. 2026-05-05 14:06:58 +02:00