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yosys/tests/arch
gatecat 48efc9b75c gatemate: Add test for LUT tree mapping
Signed-off-by: gatecat <gatecat@ds0.me>
2022-06-27 10:09:48 +01:00
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anlogic
common
ecp5
efinix
gatemate gatemate: Add test for LUT tree mapping 2022-06-27 10:09:48 +01:00
gowin
ice40
intel_alm
machxo2
nexus
quicklogic
xilinx
run-test.sh