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https://github.com/YosysHQ/yosys
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48 lines
1.4 KiB
C++
48 lines
1.4 KiB
C++
#include <gtest/gtest.h>
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#include "kernel/modtools.h"
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#include "kernel/rtlil.h"
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#include "tests/unit/yosysSetupEnv.h"
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YOSYS_NAMESPACE_BEGIN
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TEST(ModIndexSwapTest, has)
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{
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Design* d = new Design;
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Module* m = d->addModule(d->twines.add(std::string{"$m"}));
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Wire* o = m->addWire(d->twines.add(std::string{"$o"}), 2);
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o->port_input = true;
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Wire* i = m->addWire(d->twines.add(std::string{"$i"}), 2);
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i->port_input = true;
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m->fixup_ports();
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m->addNot(Twine{std::string{"$not"}}, i, o);
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auto mi = ModIndex(m);
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mi.reload_module();
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for (auto [sb, info] : mi.database) {
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EXPECT_TRUE(mi.database.find(sb) != mi.database.end());
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}
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m->swap_names(i, o);
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for (auto [sb, info] : mi.database) {
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EXPECT_TRUE(mi.database.find(sb) != mi.database.end());
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}
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}
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TEST(ModIndexDeleteTest, has)
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{
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if (log_files.empty()) log_files.emplace_back(stdout);
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Design* d = new Design;
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Module* m = d->addModule(d->twines.add(std::string{"$m"}));
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Wire* w = m->addWire(d->twines.add(std::string{"$w"}));
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Wire* o = m->addWire(d->twines.add(std::string{"$o"}));
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o->port_output = true;
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m->fixup_ports();
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Cell* not_ = m->addNotGate(Twine{std::string{"$not"}}, w, o);
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auto mi = ModIndex(m);
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mi.reload_module();
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mi.dump_db();
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Wire* a = m->addWire(d->twines.add(std::string{"\\a"}));
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not_->setPort(TW::A, a);
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EXPECT_TRUE(mi.ok());
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}
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YOSYS_NAMESPACE_END
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