3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2026-06-23 01:00:29 +00:00
yosys/kernel
Jannis Harder a5e1d3b997 formalff: Set new replaced_by_gclk attribute on removed dff's clks
This attribute can be used by formal backends to indicate which clocks
were mapped to the global clock. Update the btor and smt2 backend which
already handle clock inputs to understand this attribute.
2022-08-16 13:37:30 +02:00
..
binding.cc Generate an RTLIL representation of bind constructs 2021-08-13 17:11:35 -06:00
binding.h Generate an RTLIL representation of bind constructs 2021-08-13 17:11:35 -06:00
bitpattern.h
calc.cc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
cellaigs.cc
cellaigs.h
celledges.cc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
celledges.h
celltypes.h Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
consteval.h Remove set but unused variable 2022-05-27 12:37:03 +02:00
constids.inc formalff: Set new replaced_by_gclk attribute on removed dff's clks 2022-08-16 13:37:30 +02:00
cost.h
driver.cc Make all compile under OpenBSD (#3423) 2022-07-27 14:16:46 +02:00
ff.cc Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
ff.h Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
ffinit.h
ffmerge.cc Fix a regression from #3035. 2021-10-08 15:44:07 +02:00
ffmerge.h
fstdata.cc Observe $TMPDIR variable when creating tmp files 2022-05-27 15:06:53 +02:00
fstdata.h Start restoring memory state from VCD/FST 2022-05-04 10:41:04 +02:00
hashlib.h
log.cc Assorted microoptimization speedups in core data structures. 2022-07-27 17:05:30 +02:00
log.h Assorted microoptimization speedups in core data structures. 2022-07-27 17:05:30 +02:00
macc.h
mem.cc kernel/mem: Only use FF init in read-first emu for mem with init 2022-03-28 17:03:02 +02:00
mem.h Add proc_rom pass. 2022-05-13 00:37:14 +02:00
modtools.h
qcsat.cc Add $bmux and $demux cells. 2022-01-28 23:34:41 +01:00
qcsat.h
register.cc
register.h
rtlil.cc Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
rtlil.h Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
satgen.cc Add the $anyinit cell and the formalff pass 2022-08-16 13:37:30 +02:00
satgen.h
sigtools.h
timinginfo.h sta: very crude static timing analysis pass 2021-11-25 17:20:27 +01:00
utils.h
yosys.cc Assorted microoptimization speedups in core data structures. 2022-07-27 17:05:30 +02:00
yosys.h Assorted microoptimization speedups in core data structures. 2022-07-27 17:05:30 +02:00