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Test Case
```
module packed_dimensions_range_ordering (
input wire [0:4-1] in,
output wire [4-1:0] out
);
assign out = in;
endmodule : packed_dimensions_range_ordering
module instanciates_packed_dimensions_range_ordering (
input wire [4-1:0] in,
output wire [4-1:0] out
);
packed_dimensions_range_ordering U0 (
.in (in),
.out(out)
);
endmodule : instanciates_packed_dimensions_range_ordering
```
```
// with verific, does not pass formal
module instanciates_packed_dimensions_range_ordering(in, out);
input [3:0] in;
wire [3:0] in;
output [3:0] out;
wire [3:0] out;
assign out = { in[0], in[1], in[2], in[3] };
endmodule
// with surelog, passes formal
module instanciates_packed_dimensions_range_ordering(in, out);
input [3:0] in;
wire [3:0] in;
output [3:0] out;
wire [3:0] out;
assign out = in;
endmodule
```
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
|
||
|---|---|---|
| .. | ||
| example.sby | ||
| example.sv | ||
| Makefile.inc | ||
| README | ||
| verific.cc | ||
| verific.h | ||
| verificsva.cc | ||
This directory contains Verific bindings for Yosys. Use Tabby CAD Suite from YosysHQ if you need Yosys+Verific. https://www.yosyshq.com/ Contact YosysHQ at contact@yosyshq.com for free evaluation binaries of Tabby CAD Suite. Verific Features that should be enabled in your Verific library =============================================================== database/DBCompileFlags.h: DB_PRESERVE_INITIAL_VALUE Testing Verific+Yosys+SymbiYosys for formal verification ======================================================== Install Yosys+Verific, SymbiYosys, and Yices2. Install instructions: http://symbiyosys.readthedocs.io/en/latest/quickstart.html#installing Then run in the following command in this directory: sby -f example.sby This will generate approximately one page of text output. The last lines should be something like this: SBY [example] summary: Elapsed clock time [H:MM:SS (secs)]: 0:00:00 (0) SBY [example] summary: Elapsed process time [H:MM:SS (secs)]: 0:00:00 (0) SBY [example] summary: engine_0 (smtbmc yices) returned PASS for basecase SBY [example] summary: engine_0 (smtbmc yices) returned PASS for induction SBY [example] summary: successful proof by k-induction. SBY [example] DONE (PASS, rc=0)