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yosys/techlibs/microchip
2024-07-08 17:03:03 -04:00
..
arith_map.v
brams_defs.vh
cells_map.v
cells_sim.v
LSRAM.txt
LSRAM_map.v
Makefile.inc
microchip_dffopt.cc
polarfire_dsp_map.v
synth_microchip.cc inline all tests. Add switch to remove init values as PolarFire DFFs do not support init 2024-07-08 17:03:03 -04:00
uSRAM.txt
uSRAM_map.v