| .. |
|
arith_map.v
|
nexus: Fix arith_map CO signal.
|
2022-02-06 13:05:30 +01:00 |
|
brams.txt
|
nexus: Add make_transp to BRAMs
|
2020-10-22 15:11:59 +01:00 |
|
brams_init.vh
|
synth_nexus: Initial implementation
|
2020-10-15 08:52:15 +01:00 |
|
brams_map.v
|
synth_nexus: Initial implementation
|
2020-10-15 08:52:15 +01:00 |
|
cells_map.v
|
iopadmap: Add native support for negative-polarity output enable.
|
2021-11-09 15:40:16 +01:00 |
|
cells_sim.v
|
nexus: Fix BB sim model
|
2022-01-19 18:14:24 +00:00 |
|
cells_xtra.py
|
nexus: Add DSP simulation model
|
2020-11-18 10:21:17 +00:00 |
|
cells_xtra.v
|
nexus: Add DSP simulation model
|
2020-11-18 10:21:17 +00:00 |
|
dsp_map.v
|
nexus: DSP inference support
|
2020-11-20 08:45:55 +00:00 |
|
latches_map.v
|
synth_nexus: Initial implementation
|
2020-10-15 08:52:15 +01:00 |
|
lrams.txt
|
nexus: Add LRAM inference
|
2020-12-07 13:27:17 +00:00 |
|
lrams_init.vh
|
nexus: Add LRAM inference
|
2020-12-07 13:27:17 +00:00 |
|
lrams_map.v
|
nexus: Add LRAM inference
|
2020-12-07 13:27:17 +00:00 |
|
lutrams.txt
|
synth_nexus: Initial implementation
|
2020-10-15 08:52:15 +01:00 |
|
lutrams_map.v
|
synth_nexus: Initial implementation
|
2020-10-15 08:52:15 +01:00 |
|
Makefile.inc
|
nexus: Add LRAM inference
|
2020-12-07 13:27:17 +00:00 |
|
parse_init.vh
|
synth_nexus: Initial implementation
|
2020-10-15 08:52:15 +01:00 |
|
synth_nexus.cc
|
iopadmap: Add native support for negative-polarity output enable.
|
2021-11-09 15:40:16 +01:00 |
