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https://github.com/YosysHQ/yosys
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9f1c445fbf
Split hardware mapping from `fifo.ys` into `fifo_map.ys`. Reduces size of `fifo.out` log and allows separate yosys calls in the makefile. Some tidy up and minor changes in `fifo.ys` for better discussion. Filled out note on `clean` (changed from `opt_clean`) and introduced `;;`. Highlighted `$memrd` and added a paragraph about it. More detail on the flatten and merging of `fifo_reader` block. Brief discussion on the changes from `$memrd` to `$memrd_v2`.
46 lines
2 KiB
Plaintext
46 lines
2 KiB
Plaintext
read_verilog fifo.v
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synth_ice40 -top fifo -run begin:map_ram
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# this point should be the same as rdata_coarse
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# ========================================================
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synth_ice40 -top fifo -run map_ram:map_ffram
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_ram @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_ffram:map_gates
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_ffram @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_gates:map_ffs
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_gates @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_ffs:map_luts
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_ffs @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_luts:map_cells
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_luts @rdata_path
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# ========================================================
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synth_ice40 -top fifo -run map_cells:
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select -set new_cells t:SB_RAM40_4K
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select -set rdata_path @new_cells %ci*:-SB_RAM40_4K[WDATA,WADDR,WE] @new_cells %co* %%
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show -color maroon3 @new_cells -notitle -format dot -prefix rdata_map_cells @rdata_path
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