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yosys/techlibs/ice40
2020-06-23 18:24:53 +02:00
..
tests
.gitignore
abc9_model.v
arith_map.v Add force_downto and force_upto wire attributes. 2020-05-19 01:42:40 +02:00
brams.txt
brams_init.py
brams_map.v
cells_map.v Add force_downto and force_upto wire attributes. 2020-05-19 01:42:40 +02:00
cells_sim.v Fix Verilator sim warnings: 1 BLKSEQ and 3 WIDTH 2020-06-14 00:45:22 -07:00
dsp_map.v
ff_map.v Update dff2dffe, dff2dffs, zinit to new FF types. 2020-06-23 18:24:53 +02:00
ice40_braminit.cc Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
ice40_ffinit.cc Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
ice40_ffssr.cc Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
ice40_opt.cc Use C++11 final/override keywords. 2020-06-18 23:34:52 +00:00
latches_map.v
Makefile.inc ice40: split out cells_map.v into ff_map.v 2020-05-14 10:33:56 -07:00
synth_ice40.cc Update dff2dffe, dff2dffs, zinit to new FF types. 2020-06-23 18:24:53 +02:00