3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-09-02 08:10:46 +00:00
yosys/techlibs/lattice
2023-12-21 10:47:40 +01:00
..
arith_map_ccu2c.v
arith_map_ccu2d.v
brams_8kc.txt lattice: Disable broken port configuration in bram inference 2023-12-21 10:47:40 +01:00
brams_16kd.txt
brams_map_8kc.v lattice: Fix mapping onto DP8KC for data width 1 or 2 2023-12-20 23:42:12 +01:00
brams_map_16kd.v
ccu2c_sim.vh
ccu2d_sim.vh
cells_bb_ecp5.v fix generated blackboxes for ecp5 2023-08-28 16:26:26 +02:00
cells_bb_xo2.v enable more primitives supported with nextpnr 2023-08-25 11:45:25 +02:00
cells_bb_xo3.v enable more primitives supported with nextpnr 2023-08-25 11:45:25 +02:00
cells_bb_xo3d.v enable more primitives supported with nextpnr 2023-08-25 11:45:25 +02:00
cells_ff.vh
cells_io.vh
cells_map.v
cells_sim_ecp5.v
cells_sim_xo2.v
cells_sim_xo3.v
cells_sim_xo3d.v
cells_xtra.py fix generated blackboxes for ecp5 2023-08-28 16:26:26 +02:00
common_sim.vh enable more primitives supported with nextpnr 2023-08-25 11:45:25 +02:00
dsp_map_18x18.v
latches_map.v
lattice_gsr.cc
lutrams.txt
lutrams_map.v
Makefile.inc Add missing file for XO3D 2023-09-01 10:15:51 +02:00
synth_lattice.cc synth_lattice: Enable booth by default on XO3 2023-11-22 15:47:11 +01:00