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https://github.com/YosysHQ/yosys
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34 lines
370 B
CMake
34 lines
370 B
CMake
yosys_pass(synth_sf2
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synth_sf2.cc
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REQUIRES
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abc
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attrmap
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blackbox
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check
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clean
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clkbufmap
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deminout
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dfflegalize
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flatten
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hierarchy
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iopadmap
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memory_map
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opt
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opt_expr
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proc
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read_verilog
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simplemap
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stat
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synth
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techmap
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tribuf
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write_edif
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write_json
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write_verilog
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DATA_DIR
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sf2
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DATA_FILES
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arith_map.v
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cells_map.v
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cells_sim.v
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)
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