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979053855c
- User-defined types must be data types. Using a net type (e.g. wire) is
a syntax error.
- User-defined types without a net type are always variables (i.e.
logic).
- Nets and variables can now be explicitly declared using user-defined
types:
typedef logic [1:0] W;
wire W w;
typedef logic [1:0] V;
var V v;
Fixes #2846
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| .. | ||
| .gitignore | ||
| enum_simple.sv | ||
| enum_simple.ys | ||
| logic_rom.sv | ||
| logic_rom.ys | ||
| multirange_array.sv | ||
| multirange_subarray_access.ys | ||
| run-test.sh | ||
| static_cast_negative.ys | ||
| static_cast_nonconst.ys | ||
| static_cast_simple.sv | ||
| static_cast_verilog.ys | ||
| static_cast_zero.ys | ||
| struct_array.sv | ||
| struct_simple.sv | ||
| typedef_initial_and_assign.sv | ||
| typedef_initial_and_assign.ys | ||
| typedef_memory.sv | ||
| typedef_memory.ys | ||
| typedef_memory_2.sv | ||
| typedef_memory_2.ys | ||
| typedef_package.sv | ||
| typedef_param.sv | ||
| typedef_scopes.sv | ||
| typedef_simple.sv | ||
| typedef_struct.sv | ||
| typedef_struct_port.sv | ||
| typedef_struct_port.ys | ||
| union_simple.sv | ||