yosys/tests/fmt/.gitignore at 98d0e749d614ec6b8b77f17192d8835aa78a3ead - mirrors/yosys - Libre-Chip.org

mirrors/yosys

mirror of https://github.com/YosysHQ/yosys synced 2025-04-06 09:34:09 +00:00

whitequark c285880684 fmt: add tests for Verilog round trip of format expressions.

2023-08-11 04:46:52 +02:00

4 lines

25 B

Plaintext

Raw Blame History

	`*.log`
	`iverilog-*`
	`yosys-*`