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yosys/techlibs/ecp5
History
gatecat 266f81816b ecp5: Remove TRELLIS_SLICE and add TRELLIS_COMB model 
Signed-off-by: gatecat <gatecat@ds0.me>
2023-04-06 10:18:48 +01:00
..
tests
arith_map.v
brams.txt ecp5: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
brams_map.v ecp5: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
cells_bb.v Add additional iopad_external_pin attributes 2023-03-20 09:17:22 +01:00
cells_ff.vh
cells_io.vh Add iopad_external_pin to some basic io primitives 2023-03-20 09:17:22 +01:00
cells_map.v ecp5: Add support for mapping aldff. 2021-10-27 16:18:05 +02:00
cells_sim.v ecp5: Remove TRELLIS_SLICE and add TRELLIS_COMB model 2023-04-06 10:18:48 +01:00
dsp_map.v
ecp5_gsr.cc
latches_map.v
lutrams.txt ecp5: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
lutrams_map.v ecp5: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
Makefile.inc ecp5: Use memory_libmap pass. 2022-05-18 17:32:56 +02:00
synth_ecp5.cc insert IO buffers for ECP5, off by default 2023-03-20 09:17:22 +01:00